Maximizing the Fault Coverage in Complex Circuits by Minimal Number of Signatures

Many self-test strategies use signature analysis 10 compress the test responses. In complex circuits the test execution is divided intO a number of subtasks. each producing a signature in a self-test register. Whereas the conventional approach is to evaluate all these signatures, this paper presentS methods to minimize the number of evaluated signatures without reducing the fault coverage. This is possible, since the signatures can influence one another during the test execution. For a fixed test schedule a minimal subset of signatures can be selected, and for a predetermined minimal subset of signatures the test schedule can be constructed such that the fault coverage is maximum. Both approaches result in significant hardware savings when a self~tesl is implemented.